Summary

A neuromorphic chip is any integrated circuit that attempts to imitate the function of a biological brain by mimicking things such as cranial nerves, neurons, and synapses. It differs from traditional designs in two main ways: (1) they use analog instead of digital circuits allowing the processing of gradations rather than just on or off signals. (2) the processor and memory are collocated instead of separated avoiding the “von Neumann bottleneck” in digital chips in which data shuffles between memory and processor. Many chips use digital circuits instead of analogue chips and whether these chips can be considered neuromorphic is a contentious issue.

Viability (4) Technical viability

Intel and IBM both have research chips with increasing numbers of cores and on the latest 3nm processes. Separately there are 50+ startups developing software and algorithms for commercialisation. We’re not waiting for a technical breakthrough or scaling milestone (e.g. 100 qubits in quantum) to go to market, at least for digital-based neuromorphic chips. Clear commercial demand once chips are available.

Drivers (5)

The demand for advanced processing at the edge such as machine learning inference has a much greater need for chips with low power consumption. The amount compute used to train largest AI models doubles every 3.4 months. Resistive random-access memory (RRAM) is now in market making neuromorphic architectures possible in a way they were not with flash. Neuromorphic doesn’t require state of the art fabrication and can be developed using a 40nm process meaning fabs, especially Intel, can get more value from existing capacity.

Novelty (4)

Neuromorphic chips are aiming to compete against other chip designs primarily on energy efficiency and therefore cost. Energy efficiency is an increasing bottleneck at for high-end HPC applications and low-end low-power edge computing applications. Energy consumption versus to all von Neumann architectures including AI-specific chips from Graphcore, SambaNova, Cerebras, etc shows several orders of magnitude improvements (1000x+ vs SOTA GPUs). Competition for extreme low-power applications will come from substitutes like photonic chip designs and the analog chips.

Diffusion (3)

Unlike alternatives (photonics, quantum) neuromorphic chips use the same physics as existing chips making manufacturing by fabs easier. The same fabrication tooling can be repurposed, although that process will be difficult and costly. Very little change required from OEMs, but building applications on top of new designs requires writing entirely new software and algorithms. The fact the US and Europe are behind in the semiconductor industry makes it likely new architectures will receive state support. Investment will increase and time-to-market will speed up as US, EU and Chinese government pour money into winning the AI race, which ultimately will mean winning the hardware race.

Impact (4) Low certainty

The high impact scenario sees neuromorphic architectures (all analog components) as the best-in-class chip for deep learning training and inference. The bottleneck for deep learning is already hardware and costs. A new architecture designed for AI is arriving with AI-specific chips but a step change in energy-efficiency improvement will come with neuromorphic designs. The co-location of memory and storage is inevitable and could also come in the form of Computational Storage. Or best-in-class performance and energy efficiency might come from Optical Computing. With low certainty, and using the animal brain as an example with extreme low-power requirements, neuromorphic computing are likely to win out long-term for computing and AI on edge and mobile devices. Where low-power and size isn’t a constraint, Quantum Hardware and Optical Computing might have the edge.

Timing (2025-2030) Medium certainty

Semiconductors take a long time to produce reliably at large volumes and to get those chips into devices, and for those devices to replace old devices. Investment in node processes happens decades in advance. If prototypes deliver the orders of magnitude performance and power improvements for AI workloads as promised, we should expect orders to begin to be placed in 2023-2025 and grow in volumes up to $5 billion+ by the end of the 2020s. With the majority of the growth coming in the mid 2030s once node processes are at A5, A3 and A2 using CFETs.